The invention relates to a semiconductor device, in which at least one functional semiconductor structure is assigned to a first main surface of a III-V semiconductor substrate, and in which the functional semiconductor structure is electrically insulated from a second main surface of the III-V semiconductor substrate which is opposite the first main surface.
A semiconductor device of this type is, for example, disclosed by Franklin S. Harris, Jr., Applied Optics, Vol. 27, No. 15, page 3141. That article describes a photodiode array in which a multiplicity of AlGaAs/GaAs photodiodes are monolithically integrated on a so-called semi-insulating GaAs substrate.
In addition, G. Mxc3xcller, M. Honsberg, Journal of Optical Communications 6 (1985), June No. 2, Berlin, Germany, page 42, discloses a MCRW laser structure which is applied to a semi-insulating GaAs substrate. The semi-insulating GaAs substrate is used to electrically insulate a plurality of monolithic integrated components from one another on the substrate.
The insulating affect of semi-insulating substrates is achieved by incorporating low impurity levels into the substrates (for example Cr or C in the case of GaAs substrates, and Fe in the case of InP substrates). However, the incorporation of dopants of this type into a III-V crystal lattice entails a number of difficulties both in the production and in the handling of the lattice. It is thus, for example, very difficult to incorporate these dopants uniformly into the III-V crystal lattice and makes it considerably more difficult to produce a uniform insulation affect over the entire surface of a semi-insulating substrate. The production yield of semiconductor components having semi-insulating substrates is therefore very low, for example, in comparison with the production of semiconductor components on conductive GaAs substrates.
A further problem with the semi-insulating semiconductor substrates is the fact that their insulation effect is drastically reduced when experiencing a moderate increase in temperature because free charge carriers are produced in the semiconductor crystal.
It is accordingly an object of the invention to provide a semiconductor device which overcomes the herein-mentioned disadvantages of the heretofore-known devices, and which provides homogenous electrical insulation properties between the functional semiconductor structure disposed above the first main surface of a III-V semiconductor substrate and the second main surface of the III-V semiconductor substrate and which also provides an effective electrical insulation effect at high operating temperatures.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor device, comprising an electrically conductive III-V semiconductor substrate having mutually opposite first and second main surfaces; at least one pn junction, reverse biased during operation of the semiconductor device, and disposed,above the first main surface; and at least one functional semiconductor structure disposed above the at least one pn junction, the functional semiconductor structure being electrically insulated from the second main surface of the III-V semiconductor substrate.
According to the invention an electrically conductive III-V semiconductor substrate is provided and at least one pn junction, reverse biased during operation of the semiconductor device, is disposed between the functional semiconductor structure and the III-V semiconductor substrate. That has, in particular, the advantage of providing a conductive substrate which is substantially easier to produce and therefore more cost effective than prior art semi-insulating substrates which require a more elaborate production process. The pn junction which is reverse biased during operation undertakes the electrical insulation of the functional semiconductor structure from the second main surface of the III-V semiconductor substrate.
In accordance with an added feature of the invention, the electrically conductive III-V semiconductor substrate has a charge carrier concentration of more than 1*1015 cmxe2x88x923 at room temperature.
In accordance with another feature of the invention, the electrically conductive III-V semiconductor substrate has a charge carrier concentration of between 1*1016 cmxe2x88x923 and 1*1019 cmxe2x88x923 at room temperature.
In a preferred embodiment of the semiconductor device according to the invention, the electrically conductive III-V semiconductor substrate has a charge carrier concentration of  greater than 1xc2x71015 cmxe2x88x923 at room temperature (that is to say at about 20xc2x0 C.). It is particularly advantageous if the electrically conductive III-V semiconductor substrate has a charge carrier concentration of between 1xc2x71016 cmxe2x88x923 and 1xc2x71019 cmxe2x88x923 at room temperature. III-V semiconductor substrates of this type are produced in large numbers for conventional III-V semiconductor components and are therefore available at low cost.
In accordance with an addition feature of the invention, the III-V semiconductor substrate has a first conduction type, and includes a first doped III-V semiconductor layer of a second conduction type disposed between the III-V semiconductor substrate of the first conduction type and the at least one functional semiconductor structure.
In accordance with yet another added feature of the invention, there is a second doped III-V semiconductor layer of the first conduction type disposed between the at least one functional semiconductor layer and the first doped III-V semiconductor layer in such a way that the III-V semiconductor substrate, the first doped II-V semiconductor layer and the second doped III-V semiconductor layers form the at least one pn junction disposed in opposite directions.
In an advantageous configuration of the semiconductor device according to the invention, a doped III-V semiconductor substrate of a first conduction type is provided. Applied to that is a first doped III-V semiconductor layer of a second conduction type, to which a second doped III-V semiconductor layer of the first conduction type is in turn applied. The functional semiconductor structure is arranged on the second doped III-V semiconductor layer. The III-V semiconductor substrate and the first and the second doped III-V semiconductor layers together form two pn junctions of opposite directions. With a layer sequence of this type, one of the two pn junctions is always reverse biased during operation, irrespective of the conduction type possessed by a semiconductor layer of the functional semiconductor structure applied to the second doped III-V semiconductor layer.
In yet another additional feature of the invention, the at least one functional semiconductor structure is an MCRW laser structure.
In accordance with yet another feature of the invention, there are photodiode structures having a photodiode array disposed on the at least one functional semiconductor structure.
In accordance with yet another added feature of the invention, the at least one functional semiconductor structures are at least two monolithically integrated functional semiconductor structures, and the at least one pn junction is disposed between each of the at least two monolithically functional semiconductor structures and the second main surface of the electrically conductive III-V semiconductor substrate.
In accordance with yet another additional feature of the invention, the at least one pn junction is cut in an intermediate location between two of the at least two monolithically integrated functional semiconductor structures in such a way that there is no conductive electrical connection between the at least two monolithically integrated functional semiconductor structures via the III-V semiconductor substrate and inclusive of at least one of the first doped III-V semiconductor layer and the second doped III-V semiconductor layer.
In accordance with a concomitant feature of the invention, the at least one functional semiconductor structure is at least two monolithic integrated functional semiconductor structures of different types.
With the objects of the invention in view, there is also provided a semiconductor device, including an electrically conductive III-V doped semiconductor substrate of a first conduction type, a photodiode array having photodiode structures disposed on the III-V doped semiconductor substrate, a first III-V doped semiconductor layer of a second conduction type disposed between the photodiode structures and the III-V doped semiconductor substrate, etching trenches disposed on the III-V doped semiconductor substrate, each of the trenches having inner sides, the inner sides having an insulation layer and a metallization layer for electrically connecting the photodiode structures in series, the metallization layer disposed on the insulation layer, and partition lines separating each of the photodiode structures from others of the photodiode structures for producing an individual photodiode structure when the array is cut through the first III-V doped semiconductor layer along the partition lines.
In a further embodiment of the semiconductor device according to the invention, at least two monolithic integrated functional semiconductor structures are assigned to the electrically conductive III-V semiconductor substrate, and at least one pn junction which is reverse biased during operation of the semiconductor device is arranged between each of the functional semiconductor structures and the electrically conductive III-V semiconductor substrate. The pn junction, or the pn junctions is or are cut in an intermediate space between the functional semiconductor structures in such a way that there is no conductive electrical connection between the functional semiconductor structures via the III-V semiconductor substrate, where appropriate inclusive of one or more III-V semiconductor layers applied thereto. That is the case whenever the current path between two functional semiconductor structures would lead via a reverse biased pn junction. With a semiconductor device of this type, it is possible to produce in simple fashion an integrated circuit configuration of a multiplicity of III-V semiconductor components on a single III-V semiconductor substrate.
With the foregoing and other objects in view there is also provided, in accordance with the invention, a process for producing a semiconductor device, which comprises: a) producing a doped III-V semiconductor substrate of a first conduction type; b) applying a first doped III-V semiconductor layer of a second conduction type to the III-V semiconductor substrate; c) applying a second doped III-V semiconductor layer of the first conduction type to the first doped III-V semiconductor layer; d) applying an active layer system to the second doped III-V semiconductor layer; and e) producing at least two functional semiconductor structures electrically insulated from one another, by cutting the active layer system inclusive of the first and the second doped III-V semiconductor layers.
In a preferred process for producing a semiconductor device according to the invention, a first doped III-V semiconductor layer of the second conduction type is applied to a prefabricated doped III-V semiconductor substrate of the first conduction type. An active layer system of at least one functional semiconductor structure is then applied to the first doped III-V semiconductor layer or to a second doped III-V semiconductor layer of the first conduction type which is additionally applied to the first doped III-V semiconductor layer. After that, by cutting (for example etching through or sawing) the active layer system, inclusive of the first and, if appropriate, the second doped III-V semiconductor layers, at least two functional semiconductor structures are produced which are electrically insulated from one another. These can then be electrically connected to one another by providing contact metalizations and, if appropriate, be connected to further components arranged externally.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in semiconductor device, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.